Companies that work together typically want to protect their proprietary information. This is particularly so in integrated circuit design and fabrication in which one company designs an integrated circuit and a different company manufactures it. Companies that design chips will typically not give detailed chip design information to the fabricator company. The design itself is important intellectual property of the chip design company. All the fabricator typically knows of the design is embodied in the fabrication mask or masks.
As a result, when a manufactured device failure occurs, the fabricator company would typically have very little information to determine whether the failure is the result of a design flaw or a fabrication error because the fabricator company might have no design information other than the manufacturing mask or masks. The error analysis situation is much worse at production test, because only the pattern and design information are known.
The present invention provides encrypted chip information that allows a failure analysis lab (FA Lab) to determine the location on a chip where a fault occurred. The failure analysis lab can then look at that location, such as with an electron microscope, to determine the cause of the failure. The failure analysis lab can determine if there was a flaw in the production, such as a solder fabrication flaw or contamination or poor metallization, or if the failure was caused by the original mask or design.
This invention resolves the problem that arises when the fabricators or the production engineers find an error or failure but do not have enough information to correctly diagnose the cause the error or failure. This occurs more often when the fabricators and designers are at different companies than when the fabricators and designers are at the same company. Without more information, fabricators might be inclined to believe that problems arise from designs, while designers might be inclined to believe that a problem is caused by the fabricator. The present invention allows resolution such problems.
This invention provides encrypted information that allows a failure analysis lab to locate the exact location where a chip failure has occurred. The failure analysis lab can then look at the specific location, such as under an electron microscope, to determine if the problem is due to a process flow problem or fabrication error (for example, a solder fabrication flaw, contamination, or poor metallization). If no manufacturing problem is identified, then a design problem could be the cause of failure.
This invention provides a secure information exchange, so the fabricator can quickly discover a physical location where design or production flaws might be present. Scan logs provide logical information, which allows the physical location of the failure to be determined. Previously, the fabricator would have to go to the original designer to obtain information to locate the flaw, which could take many months or worst cases the designer would not release the information at all.
Additional objects and advantages of the present invention will be apparent from the detailed description of the preferred embodiment thereof, which proceeds with reference to the accompanying drawings.